It is well known to use CMOS, active pixel image sensors in which incident light generates electrons that are captured by a photodiode in the pixel. When a high speed image sensor is desired, there is less time available for capturing light. One way to address this problem is to increase the illumination level, but this is frequently impracticable or undesirable.
Another approach is to use large pixels, since more photons impinge on a large pixel than a small pixel given the same field of view and field depth. However, in the prior art large pixels have a large photodiode and the capacitance of the photodiode is also increased. These photodiodes are usually operated in a voltage mode, and since V=Q/C, the capacitance rises as the voltage falls.
What is required is a large area pixel, but with a small sensing capacitance. U.S. Pat. No. 5,471,515 describes one approach to this requirement by putting a thin photogate layer over the light collecting part of the pixel. By applying a voltage to the photogate, the electrons are pushed through the transfer gate and into the sense node. However, there are practical disadvantages using this technique with large pixels. One is that a large photogate area is difficult to manufacture with high yields. Another is that pushing the electrons over a large area into the transfer gate (charge transfer efficiency) is also difficult to achieve. These problems may be addressed by modifying the manufacturing process, but this is not desirable since silicon fabrication costs rely on mass produced devices using a standard process.